I got in touch with them to request some sample hardware, and a couple of weeks later, here it is!
The QuickFeather devkit is quite interesting: the footprint is mostly compatible with the Adafruit Feather series of devices, but double-sided rather than stacking headers and some extra header pins on the top. Like the Feather boards, there’s a LiPo controller build in, but on this board there’s also a bunch of sensors (accelerometer, pressure sensor, MEMS mic).
The board is a bit longer than a regular feather, with another 16 pin I/O connector on the end. It’s advertised as “compatible with 0.1” breadboards” but with those extra pins populated it will no longer fit in a normal breadboard unless you hang those off the end of the board.
For better Feather compatibility, I’d suggest using stackable headers in the ‘standard’ feather pins positions, and moving the extra 16 pins to be in line with those but leave them unpopulated. Possibly even add some little holes to make it easy to snap the extra bit off for 100% feather compatibility, a bit like the ESPea32.
(or like the QOMU for that matter)
The chip runs at 3.3V (or at least, that’s the supply voltage on this board, it’ll run down to 1.8V). You can see from the schematic that all the dev kit I/O pins have 22 ohm series resistors on them, which is nice to limit the chaos if you accidentally connect 5V logic to any of these pins.
It’s kind of confusing just how many kinds of I/O there are. The QuickLogic EOS S3 datasheet includes a table (Table 31, Page 98) of how the pins are related.
The I/O Multiplexor (see the QuickLogic EOS S3 Multiplexor User Guide](https://www.quicklogic.com/wp-content/uploads/2020/06/QL-EOS-S3-Sensor-Processing-Platform-IOMUX-User-Guide.pdf) ) switches each IO Pin between GPIO, FBIO and various special purpose peripherals.
There’s a lot I haven’t worked out yet.
(See also QuickFeather Development Kit User Guide)
On plugging it in with USB to a Linux machine and resetting the board with the “reset” button,
the LED flashes blue and then it appears as
1d50:6140 OpenMoko, Inc..
It’s a standard
cdc_acm device so it appears in Linux as
It doesn’t stick around for long though, after
a few seconds without connecting the board seems to disconnect.
As shipped there’s a little diagnostic tool on the flash which lets you turn the LEDs on and off, but to actually do much with this board you need a SWD programmer such as a Segger J-link with a teeny 0.05” pitch connector. Something like this.
There’s a 0.05” SWD header on the top, so we might as well try that out too.
Two shorting headers need to be installed (
J7), the SWD cable attached
J6 and power provided by battery or USB.
The drivers for the J-link device are available in the Ubuntu
Try to remember they have weird capitalized names like
At this point we can have a little conversation:
$ JLinkExe SEGGER J-Link Commander V6.40 (Compiled Oct 26 2018 15:08:38) DLL version V6.40, compiled Oct 26 2018 15:08:28 Connecting to J-Link via USB...O.K. Firmware: J-Link EDU Mini V1 compiled Jan 7 2019 14:01:42 Hardware version: V1.00 S/N: 801001970 License(s): GDB, FlashBP VTref=3.294V Type "connect" to establish a target connection, '?' for help J-Link>device cortex-m4 J-Link>si swd Selecting SWD as current target interface. J-Link>speed 4000 Selecting 4000 kHz as target interface speed J-Link>connect Device "CORTEX-M4" selected. Connecting to target via SWD Found SW-DP with ID 0x2BA01477 Scanning AP map to find all available APs AP: Stopped AP scan as end of AP map has been reached AP: AHB-AP (IDR: 0x24770011) Iterating through AP map to find AHB-AP to use AP: Core found AP: AHB-AP ROM base: 0xE00FF000 CPUID register: 0x410FC241. Implementer code: 0x41 (ARM) Found Cortex-M4 r0p1, Little endian. FPUnit: 6 code (BP) slots and 2 literal slots CoreSight components: ROMTbl @ E00FF000 ROMTbl: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7 ROMTbl: E0001000, CID: B105E00D, PID: 003BB002 DWT ROMTbl: E0002000, CID: B105E00D, PID: 002BB003 FPB ROMTbl: E0000000, CID: B105E00D, PID: 003BB001 ITM ROMTbl: E0040000, CID: B105900D, PID: 000BB9A1 TPIU Cortex-M4 identified. J-Link>i JTAG Id: 0x2BA01477 Version: 0x2 Part no: 0xba01 Man. Id: 023B J-Link>qc
This interface can be used to load software onto both the Cortex M4 CPU and the FPGA.
Symbiflow is an Open Source FPGA toolchain which supports many FPGA families including the QuickLogic EOS used by this board. It’s not available as a Ubuntu package yet so we’re in “clone and build” territory.
Maybe don’t try this on a limited bandwidth link, there’s a lot of submodules to load.
When I was messing around with Symbiflow last time I didn’t achieve much on my stated aims but I did work out a much (subjectively) nicer way to build stuff, without conda or apio or litex-buildenv, so I might have to work that out again.